Initialize the bootstrap state

No DRAM yet, but we can't wait

Cache lines mapped

To physical space

Bootstrap code finds its base

MTRRs guide memory type arrays

Cache coherency can't decay

Ring zero execution phase

Watch the memory mapping race

Cache-as-RAM! (Cache-as-RAM!)

Breaking free from POST restraints

Cache-as-RAM! (Cache-as-RAM!)

Early execution claims its place

Stack pointer rising

Through cache ways

Cache-as-RAM will guide

Us through this phase!

No-eviction mode engaged

Write-back policy arranged

Cache regions mapped and flow

Where the startup code can grow

Assembly dance in BSP flow

Cache ways become

Our temporal home

Until the DRAM comes alive

Cache-as-RAM helps us survive!

Cache-as-RAM! (Cache-as-RAM!)

Breaking free from POST restraints

Cache-as-RAM! (Cache-as-RAM!)

Early execution claims its place

Stack pointer rising through L1 ways

Cache-as-RAM will guide

Us through this phase!

From cold boot to memory train

Cache-as-RAM maintains the frame

Soon the DRAM will awake

But this moment we'll never forsake!